{"id":535480,"date":"2025-01-06T07:30:54","date_gmt":"2025-01-06T07:30:54","guid":{"rendered":"https:\/\/www.capgemini.com\/mx-es\/?p=535480&#038;preview=true&#038;preview_id=535480"},"modified":"2025-04-03T16:40:28","modified_gmt":"2025-04-03T16:40:28","slug":"process-migration-strategies-for-chip-makers-experiencing-the-worst-supply-shortages","status":"publish","type":"post","link":"https:\/\/www.capgemini.com\/mx-es\/insights\/expert-perspectives\/process-migration-strategies-for-chip-makers-experiencing-the-worst-supply-shortages\/","title":{"rendered":"Process migration strategies for chip-makers experiencing the worst supply shortages"},"content":{"rendered":"\n<header class=\"wp-block-cg-blocks-hero-blogs header-hero-blogs\"><div class=\"container\"><div class=\"hero-blogs\"><div class=\"hero-blogs-content-wrapper\"><div class=\"row\"><div class=\"col-12\"><div class=\"header-title\"><h1>Process migration strategies for chip makers experiencing the worst supply shortages<\/h1><\/div><\/div><\/div><\/div><div class=\"hero-blogs-bottom\"><div class=\"header-author\"><div class=\"author-img\"><img decoding=\"async\" src=\"https:\/\/www.capgemini.com\/wp-content\/uploads\/2022\/04\/yatin.jpg?w=400?w=200&amp;quality=10\" alt=\"\" loading=\"lazy\"\/><\/div><div class=\"author-name-date\"><h5 class=\"author-name\">Yatin Trivedi<\/h5><h5 class=\"blog-date\">8 Apr 2022<\/h5><\/div><\/div><div class=\"brand-image\"><img decoding=\"async\" loading=\"lazy\" src=\"\/wp-content\/themes\/capgemini2020\/assets\/images\/capgemini-engineering-white.svg\" alt=\"capgemini-engineering\"\/><\/div><\/div><\/div><\/div><\/header>\n\n\n\n<section class=\"wp-block-cg-blocks-intro-para undefined section section--intro\"><div class=\"intro-para\"><div class=\"container\"><div class=\"row\"><div class=\"col-12 col-md-1\"><nav class=\"article-social\"><ul class=\"social-nav\"><li class=\"ip-order-fb\"><a href=\"https:\/\/www.facebook.com\/sharer\/sharer.php?u=https:\/\/www.capgemini.com\/mx-es\/insights\/expert-perspectives\/process-migration-strategies-for-chip-makers-experiencing-the-worst-supply-shortages\/\" target=\"_blank\" rel=\"noopener noreferrer\" title=\"abrir en una nueva ventana\"><i aria-hidden=\"true\" class=\"icon-fb\"><\/i><span class=\"sr-only\">Facebook<\/span><\/a><\/li><li class=\"ip-order-li\"><a href=\"https:\/\/www.linkedin.com\/sharing\/share-offsite\/?url=https:\/\/www.capgemini.com\/mx-es\/insights\/expert-perspectives\/process-migration-strategies-for-chip-makers-experiencing-the-worst-supply-shortages\/\" target=\"_blank\" rel=\"noopener noreferrer\" title=\"abrir en una nueva ventana\"><i aria-hidden=\"true\" class=\"icon-li\"><\/i><span class=\"sr-only\">Linkedin<\/span><\/a><\/li><\/ul><\/nav><\/div><div class=\"col-12 col-md-11 col-lg-10\"><h2 class=\"intro-para-title\">This blog is the second post in a four-part series about the global chip supply shortage.\u00a0<\/h2><p class=\"intro-para-content\">This post focuses on practical insights into how chip designers can leverage process and fab migration strategies to quickly replace the devices experiencing the worst supply shortages.\u00a0These same insights also offer long-term risk mitigation strategies to help suppliers prevent future disruptions by not being bound to a single process node or single fab in the future.<\/p><\/div><\/div><\/div><\/div><\/section>\n\n\n\n<section class=\"wp-block-cg-blocks-group undefined section section--article-content\"><div class=\"article-main-content\"><div class=\"container\"><div class=\"row\"><div class=\"col-12 col-md-11 col-lg-10 offset-md-1 offset-lg-1\"><div class=\"article-text article-quote-text\">\n<p>Read the first post here:&nbsp;<a href=\"https:\/\/www.capgemini.com\/insights\/expert-perspectives\/todays-chip-shortage-understanding-the-perfect-storm-that-led-us-here\/\">Documenting the global causes of semiconductor shortages<\/a>.<\/p>\n\n\n\n<p>Today both semiconductor companies and system companies designing their own chips face similar challenges to chip-shortage recovery: how to get more chips into the hands of customers ASAP.&nbsp;But the solution will be different for each chip because the manufacturing capacity issues, needed volumes, and the urgency of customer demand are different in each case.&nbsp;So whether you work in the semiconductor industry or for a systems company in an industry vertical, the methodology outlined below can help you weigh your options.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\" id=\"h-weighing-the-alternatives\"><strong>Weighing the alternatives<\/strong><\/h3>\n\n\n\n<p>Companies in this situation are here because they designed a chip to be manufactured in a specific process node, but the capacity to fab that chip is not available because of production shutdowns or reallocation of capacity. So, until manufacturing capacity in the original nodes becomes available, there are a few options to consider.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The first is: do nothing and wait out the shortage. Over the coming months and years, fabs will be restoring production, and some will be expanding global production. For some process nodes, the shortage may be over within a few months; for others, it may take years. So it\u2019s important to balance waiting against the time, effort, and cost of another solution. Waiting may work if you know how long the supply shortage will affect your company and customers, and your business can withstand the consequences of the delay.<\/li>\n\n\n\n<li>For some applications, the same functionality or PPA can be achieved in other ways.&nbsp;The functionality and features of today\u2019s FPGAs are far superior compared to a few years ago.&nbsp;While not a common solution, some designs can be moved to an FPGA mounted on a pin-compatible mezzanine board plugged into the same chip socket.&nbsp;Some functionality can also be repurposed to a different chip in the family (if available) through software optimization.<\/li>\n\n\n\n<li>For most chips, a durable solution to today\u2019s shortage and future supply disruptions involves migrating the original chip design to a new process (either older or newer) for manufacturing at the current or different fab where there is available capacity for that node.&nbsp;Each choice entails different timelines and levels of complexity, so it\u2019s important to weigh these alternatives.&nbsp;(ÎÚÑ»´«Ã½ Engineering is not recommending a process or fab change. This is a business decision dependent on acquiring capacity and the commitment to volume, unit cost, and other factors.)<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Timeline of relevant effort and time for each option<\/strong><\/h3>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Understand your goals and technology challenges in process migration<\/strong><\/h3>\n\n\n\n<p>What\u2019s next for those considering retargeting to a different node?&nbsp;Process migration is complex, and you will be working with a design that is at least a few years old, so it\u2019s likely that both your business goals and technology resources have changed since the original chip was launched.&nbsp;Before you commit to retargeting, it\u2019s important to understand your goals and challenges to be sure migration is feasible and, if so, to guide the choice of process node.<\/p>\n\n\n\n<p>Some of you may be thinking, can\u2019t I just get a new library for the new process \/ node \/ fab and run this design through the same flow with the new library?&nbsp;Sadly, no, because migration impacts are felt well beyond chip design.&nbsp;There are many design components, decisions, assets, tools, etc., other than the library that are potentially impacted by the migration.&nbsp;And even if a simple library swap is possible, it would overlook another critical benefit of migration: the opportunity to create new value.<\/p>\n\n\n\n<p>Let\u2019s walk through three areas of feasibility that will help you make the best decisions for a successful migration.<\/p>\n\n\n\n<ol class=\"wp-block-list\">\n<li><strong>Review business goals, risks, and limitations.<\/strong>Think through your specific goals, the potential risks, and intended business outcomes, such as:\n\n\n<ul class=\"wp-block-list\">\n<li>What specific business goals do you hope to achieve through this migration, in addition to recovering supply?<\/li>\n\n\n\n<li>What are your production requirements (eg, unit cost, budget, time, etc.)?<\/li>\n\n\n\n<li>How quickly are supply issues likely to be resolved given your fab\u2019s resources and plans for production and expansion?<\/li>\n\n\n\n<li>Would moving to a new process extend your chip\u2019s shelf life?<\/li>\n\n\n\n<li>What are the impacts of the chip on volume and unit cost (for both original and new chips)?<br><\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>Understand the technology challenges and design impacts on the chip<\/strong>Your design is at least a few years old, so there could be significant challenges to updating it, such as:\n\n\n<ul class=\"wp-block-list\">\n<li>Is the design database still available;&nbsp;can you bring it up?&nbsp;If not, what is needed to recreate it?&nbsp;Is this cost and time effective?<\/li>\n\n\n\n<li>What impacts will a process change have on power, performance, area (PPA), floorplan, memories, DFx, etc.?<\/li>\n\n\n\n<li>What is the impact on IPs?&nbsp;Are they available in the new node, or will they need to be ported?<\/li>\n\n\n\n<li>Do you have the new process design kit (PDK) or library?&nbsp;Have you worked with this PDK before?&nbsp; &nbsp;<\/li>\n\n\n\n<li>Are there metal fixes, engineering change orders (ECOs) and other manual changes to the previous design that need to be made?<\/li>\n\n\n\n<li>Are EDA design tools available for the existing and target nodes?<\/li>\n\n\n\n<li>What impact will this have on other chips in the same family or roadmap?<\/li>\n\n\n\n<li>What impact will a different process have on packaging, assembly, product testing, etc.?<\/li>\n\n\n\n<li>Will the new chip need to pass industry-specific certifications or regulatory approvals?<br><\/li>\n<\/ul>\n<\/li>\n\n\n\n<li><strong>Explore opportunities to create new value \u2013 revenue, lifespan, functionality, etc.<\/strong>Process migration also creates the opportunity to deliver new value in many forms, such as:\n\n\n<ul class=\"wp-block-list\">\n<li>Improving performance or functionality through software<\/li>\n\n\n\n<li>Eliminating spare registers, ports, and redundant logic of the original design<\/li>\n\n\n\n<li>Exploring if a cheaper node is available now that could help lower cost per unit volume<\/li>\n\n\n\n<li>Implementing new features to reduce testing time or improve quality<\/li>\n\n\n\n<li>Entering new markets that have process-specific requirements<\/li>\n\n\n\n<li>Creating a family of products at different prices, performance, and power<\/li>\n\n\n\n<li>Fixing known quality and functionality issues of the original chip<\/li>\n<\/ul>\n<\/li>\n<\/ol>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Implementing second sourcing as a design best practice<\/strong><\/h3>\n\n\n\n<p>In the context of today\u2019s chip shortage, process migration chip designers options to move their designs quickly to utilize available manufacturing capacity.&nbsp;In addition, when implemented as part of chip design best practices during the design of each new chip, second sourcing (preparing tapeout in a second process) can also lower business risk during future supply chain disruptions.<\/p>\n\n\n\n<p>ÎÚÑ»´«Ã½ Engineering offers complete process migration services to help companies adapt and update existing chip designs and IP assets for manufacturing in a new process or fab.&nbsp;<a href=\"https:\/\/capgemini-engineering.com\/uk\/en\/integrated_solution\/chip-ip-migration-offer\/\" target=\"_blank\" rel=\"noreferrer noopener\">Learn more here<\/a>.<\/p>\n\n\n\n<p>Read other posts in this blog series to learn more.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The&nbsp;<a href=\"https:\/\/www.capgemini.com\/insights\/expert-perspectives\/todays-chip-shortage-understanding-the-perfect-storm-that-led-us-here\/\">first post<\/a>&nbsp;summarizes some of the causes of today\u2019s&nbsp;chip shortage&nbsp;.<\/li>\n\n\n\n<li>The third post will focus on options and strategies in use by OEMs to cope with the shortages they\u2019re experiencing.<\/li>\n\n\n\n<li>The fourth post will share some new best practices that chip developers and system companies can adopt to avert future supply-chain disruptions and make their designs more portable and reusable.<\/li>\n<\/ul>\n<\/div><\/div><\/div><\/div><\/div><\/section>\n\n\n\n<section class=\"wp-block-cg-blocks-wrapper-people-slider section section--expert-slider wrapper-people-slider undefined\"><div class=\"container\"><div class=\"content-title\"><h2 data-maxlength=\"34\" class=\"people-heading-title\">Author<\/h2><\/div><\/div><div class=\"slider slider-boxed\"><div class=\"container\"><div class=\"slider-window\"><div class=\"slider-list\"><\/div><\/div><\/div><div class=\"slider-nav\"><button class=\"slider-prev inactive\" aria-label=\"Slider-previous\" tabindex=\"-1\"><\/button><ul class=\"slider-paginator\"><\/ul><button class=\"slider-next\" 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